Clk_Calc_New_Rates

Clk_Calc_New_Rates. Michael turquette <mturquette@linaro.org>, bartlomiej zolnierkiewicz <b.zolnierkie@samsung.com> cc: > step in clk_calc_new_rates that fills in new_rate, new_parent, etc.

ZynqMP 向け Debian/Linux(v2019.1版) でFPGA クロックの周波数の変更に失敗する件 Qiita from qiita.com

> > this flag is needed to fix the issue with wrong dividers being setup > > by common clock framework when using the new exynos cpu clock support. > step in clk_calc_new_rates that fills in new_rate, new_parent, etc. Michael turquette , bartlomiej zolnierkiewicz cc:

Source: qiita.com

Sylwester nawrocki <s.nawrocki@samsung.com>, stephen boyd. In case of exynos cpu clock support pre/post clock > > > > notifiers are registered for mout_apll clock which is a parent of armclk

> > > > Clk_Calc_New_Rates(Clk, Rate) Before Both Pre/Post Clock Notifiers Have > > > > A Chance To Run.

Clk_calc_subtree was called at every step up the clk tree in clk_calc_new_rates. Check our new training course. Sylwester nawrocki <s.nawrocki@samsung.com>, stephen boyd.

> > Clk_Calc_New_Rates(Clk, Rate) Before Both Pre/Post Clock Notifiers Have > > A Chance To Run.

On fri, aug 31, 2018 at 2:20 pm derek basehore wrote: 2) even if the rate is higher. Step in clk_calc_new_rates that fills in new_rate, new_parent, etc.

> Step In Clk_Calc_New_Rates That Fills In New_Rate, New_Parent, Etc.

Michael turquette <mturquette@linaro.org>, bartlomiej zolnierkiewicz <b.zolnierkie@samsung.com> cc: The issue happens because clk_core_set_rate_nolock() calls clk_calc_new_rates(clk, rate) before both pre/post clock notifiers have a chance to run. Peng fan <peng.fan@xxxxxxx> if the protect_count of the parent clk is not 0, we not calculate new rates for parent.

Since It Recursively Calls Itself For Its Children, This Means It Would Be Called Once On Each Clk For Each.

The issue happens because clk_core_set_rate_nolock() calls clk_calc_new_rates(clk, rate) before both pre/post clock notifiers have a chance to run. Michael turquette <mturquette@linaro.org>, bartlomiej zolnierkiewicz <b.zolnierkie@samsung.com> cc: In case of exynos cpu clock support.

Since It Recursively Calls Itself For Its Children, This Means It Would Be Called Once On Each Clk For Each

> since the clks not called directly for clk_calc_new_rates can only > change their rate, we only set new_rate in. > the issue happens because clk_core_set_rate_nolock() calls > clk_calc_new_rates(clk, rate) before both pre/post clock notifiers have > a chance to run. Step in clk_calc_new_rates that fills in new_rate, new_parent, etc.